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asic:timing:start [2023/11/25 06:55] rajit [Reading in Liberty files] |
asic:timing:start [2024/03/22 16:02] rajit [Creating the timing graph] |
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==== Creating the timing graph ==== | ==== Creating the timing graph ==== | ||
- | There are two ways to create a timing graph. | + | There are two ways to create a timing graph: |
+ | - When the design is fully specified in ACT and production rules are specified using cells that are auto-extracted by the ACT tools (e.g. using the '' | ||
+ | - When the design has user-specified cells/black box cells, then ACT assumes that timing arcs could potentially relate any input pin of the cell to any output pin, and the arcs are computed based on those specified in the '' | ||
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+ | ==== Reading in parasitics ==== | ||
===== Power ===== | ===== Power ===== |