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asic:timing:start [2024/08/16 18:34] – [Creating the timing graph] rajitasic:timing:start [2024/08/19 12:32] (current) – [Timing] rajit
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    * [[asic:timing:constraints|Timing constraints]]    * [[asic:timing:constraints|Timing constraints]]
  
-Note that timing analysis requires that the design has been mapped to [[asic:cells:start|cells]].+Note that timing analysis requires that the design has been mapped to [[asic:cells:start|cells]], and these 
 +cells have been [[asic:timing:xcell:start|characterized]] using extensive circuit simulations that are summarized in a Liberty file.
  
 ==== Loading the timer ==== ==== Loading the timer ====
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 ^ Command ^ Meaning  ^ ^ Command ^ Meaning  ^
 | timer:run  | Runs timing analysis on the design. This command returns a list ''(p M)'', where ''p'' is the cycle period and ''M'' is the unfolding factor. | | timer:run  | Runs timing analysis on the design. This command returns a list ''(p M)'', where ''p'' is the cycle period and ''M'' is the unfolding factor. |
 +
 +==== Queries ====
 +
 +Once the run command is complete, a number of queries can be used to interrogate the computed timing.  To see the critical cycle in the design, use
 +<code>
 +interact> timer:crit
 +</code>
 +
 +Timing information for a net can be viewed using
 +<code>
 +interact> timer:info a.b.signal
 +</code>
  
 ==== Reading in parasitics ==== ==== Reading in parasitics ====
asic/timing/start.1723833269.txt.gz · Last modified: 2024/08/16 18:34 by rajit
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