Differences

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--- config:runtime [2023/01/30 21:42] – [Circuit level selection] rajit
+++ config:runtime [2023/08/25 13:56] (current) – [External Black Box Support] rajit
@@ Line 101: / Line 101: @@
 begin level
   begin inst
-     string_table device "i1.i2.i3" # list of instances at the device level, etc.
+     string_table device "i1.i2.i3" # instance i1.i2.i3 should be modeled at the device level
-   end
+  end
 end
 </code>
+Finally, ACT supports a [[language:langs:refine|refinement]] body using the ''refine { ... }'' syntax. The way this is selected is the following. When processing an ACT file, the library maintains a current refinement level. By default, the value is zero, but it can be set to any integer using either the ''-ref='' [[stdoptions:start|command-line option]], or by setting the configuration parameter
+<code>
+# set the initial refinement step to 4
+int act.refine_steps 4
+</code>
+If the current refinement step count is positive, then any ''refine { ... }'' block is used to replace all other sub-language blocks in the ACT definition. If a refine block is not present, then the ACT body is processed as usual. This functionality can be used to replace a CHP description with, for example, an implementation consisting of a number of other instances. Furthermore, when processing the ''refine'' body, the step count is decremented by one. This means that nested refinements can be processed as well, and the level of refinement is selected by either a command-line option or the ''act.refine_step'' configuration option.
 ===== Decomposition passes =====
+The memory decomposition and arbiter decomposition passes are used to replace memory structures and arbiters with a separate process, and introduce communication channels to interact with that process to re-create the original user-specified functionality. The process names used for this purpose can be modified using the following configuration options. The default values are provided below.
+<code>
+begin act
+  begin decomp
+    string mem "std::mem"
+    string arbiter "std::arbiter"
+   end
+ end
+</code>
+===== Verilog global signal prefix =====
+Since ACT can refer to global signals, this functionality may be needed when converting ACT files into Verilog netlists. Different systems may have different ways that a user can access signals  starting from the top-level in Verilog.
+<code>
+begin act
+  string global_signal_prefix "top."
+end
+</code>
+This specifies that a global signal ''foo'' can be accessed from Verilog using ''top.foo''.
+===== External Black Box Support =====
+ACT also provides a mechanism for "black box" modules---components that are defined elsewhere, like external hard macros. We assume that the external specification of the macros includes:
+     * A LEF file, for layout generation, along with bounding box information in the LEF coordinate system
+     * A SPICE file, for circuit simulation
+     * A Verilog file, for Verilog exports
+     * TBD
+A process is treated as a black box if it is defined with an empty body. For example:
+<code act>
+defproc bbproc (bool? A, B, C; bool! D) { }
+</code>
+is interpreted as a black box by default. (Note that there is a configuration parameter that can be used to turn off this behavior, in which case this component will be eventually stripped out of the design since it does not contain any circuit component.)  For this to work correctly, direction flags for ports must be present.
+The location of the LEF/SPICE/Verilog/etc. for the black box must be included in an ACT configuration file using the following configuration section:
+<code>
+begin macros
+    begin <expanded-name>
+      string lef  "lef_file_path"
+      string spice "spice_file_path"
+      string verilog "verilog_file_path"
+      int llx <val>
+      int lly <val>
+      int urx <val>
+      int ury <val>
+     end
+end
+</code>
+The expanded name is the fully expanded name for the process (in this case ''bbproc<>''). The value (llx,lly,urx,ury) are the bounding box coordinates from the LEF. If some files are unavailable, use "/dev/null" as the file name (on Unix-based systems).
+==== Generalized External Black Box ====
+Sometimes we require a more sophisticated model for an external black box. In particular, we might want to specify internal nodes within the black box so that the timing model for the black box can be made more precise. For this purpose, a more general black box syntax is supported.
+<code act>
+defproc bbproc (bool? A, B, C; bool! D) { bool int1, int2; }
+</code>
+This process will also be treated as a black  box, but with the understanding that there are also internal nodes that might be used to build a more sophisticated timing model.
+A generalized black box body can only contain instances of signals that are of type ''bool''.