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config:start [2023/06/25 15:14] – [Generic configuration settings] rajit | config:start [2025/06/05 09:58] (current) – rajit |
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</code> | </code> |
Here the variable is an array (a.k.a. table) that corresponds to the space-separated list of values. | Here the variable is an array (a.k.a. table) that corresponds to the space-separated list of values. |
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| <code> |
| int_tablex <var> values |
| real_tablex <var> values |
| string_tablex <var> values |
| </code> |
| Here the variable is an array (a.k.a. table) as before, but the values are appended to the existing table; i.e. the table is extended. |
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<code> | <code> |
Finally, a ''#'' in the first column can be used for comments (upto the end of line). | Finally, a ''#'' in the first column can be used for comments (upto the end of line). |
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| ===== The configuration files ===== |
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| There are a number of different configuration files used by a technology. The bulk of the configuration options are technology-specific. These are used to convert a technology-independent ACT description into a technology-specific output (e.g. a SPICE netlist). The standard set of configuration files we expect are: |
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===== Technology-independent configuration ===== | * ''global.conf'': [[config:generic|general]] configuration information for a technology. |
| * ''prs2net.conf'': [[config:netlist|netlist]] generation configuration file, used to translate gate-level descriptions with abstract sizing into a transistor-level netlist. |
Technology-independent configuration is stored in ''global.conf''. This file contains information that doesn't depend on the details of the technology provided by the foundry. The only item here that could be viewed as technology-specific corresponds to the transistor flavors supported (i.e. different thresholds, I/O transistors, etc). We normally use a fixed set of names for these transistor flavors in the ACT file, independent of technology. The standard flavors we tend to use are: | * ''layout.conf'': [[config:layout|layout]] generation from netlist. |
* ''svt'' : standard threshold voltage, the default transistor flavor | * ''lint.conf'': [[config:lint|linting]] configuration for analyzing SPICE simulation traces. |
* ''lvt'' : low threshold voltage | * ''expropt.conf'': [[config:expropt|expression optimization]] configuration, used to run external logic synthesis tools for translating Boolean and integer expressions into logic gates. |
* ''hvt'' : high threshold voltage | * ''models.sp'': In the standard technology configuration directory, the file ''models.sp'' should exist if mixed-signal and analog modeling is to be used. This particular file should include the SPICE commands necessary to include all the device models needed for simulation. This is typically a single line of the form ''.lib "<path-to-models>" TT'' |
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Other common names are: | |
* ''od25'': I/O device for 2.5V | |
* ''od18'': I/O device for 1.8V | |
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==== Generic configuration settings ==== | |
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These settings have to do with various options that can impact ACT circuit construction and output generation. | |
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=== Circuit construction complexity === | |
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<code> | |
begin act | |
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int max_recurse_depth 1000 | |
int max_loop_iterations 1000 | |
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end | |
</code> | |
These two parameters control the expansion/elaboration phase of ACT. ACT language constructs | |
include while loops, as well as recursive circuit constructions. To ensure that the ACT expansion phase will always terminate (albeit with an error), these two parameters control the maximum depth of recursive expansions as well as the maximum number of iterations of a while loop. | |
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<code> | |
begin act | |
int subconnection_limit 16384 | |
end | |
</code> | |
This specifies a limit on array sizes that also have internal sub-connections (i.e. arrays that are not just simple memories, for example). The limit should be increased as needed, but can have a performance impact if you have a very large array with internal sub-connections. | |
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=== Warnings === | |
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The following warnings can be turned on/off using an ACT configuration setting. They can also be adjusted via the standard act [[stdoptions:start|command-line options]]. These are integer ACT configuration variables that should be set to either zero (turn off warning) or one (turn on warning). | |
* ''act.warn.empty_select'': warn if all the guards in a selection statement in ACT (the core language, not the CHP/HSE sub-language) are false. | |
* ''act.warn.double_expand'': warn if an ACT tool attempts to expand an already expanded ACT object. | |
* ''act.warn.no_local_driver'': warn if a local variable doesn't have a driver if detected during some of the ACT analysis passes. | |
* ''act.warn.dup_pass'': warn if an ACT tool registers a duplicate pass. | |
* ''act.warn.lang_subst'': warn if an ACT tool uses a different language body within a process than the default choice. | |
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=== Output generation and name mangling === | |
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<code> | |
begin act | |
string mangle_chars ".:()<>[],{}"" | |
end | |
</code> | |
Sometimes it is useful to export files from the ACT format to other formats to interact with external tools. Examples of such formats include Verilog and SPICE. Since these are different languages, they use different syntax for identifiers. (Different commercial SPICE simulators use different identifier syntax too.) ACT identifiers and names include characters including ''['', '']'', ''.'', ''<'', ''>'' (among others). The ACT library provides a generic //name mangling// feature that can be used to convert them into identifiers that only use alphanumeric characters (i.e. basic C-style identifiers). The ''mangle_chars'' string specifies which characters should be //mangled//. Up to 36 characters can be mangled. By default, the ''_'' character is used to mangle characters. | |
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<code> | |
begin act | |
string mangle_letter "_" | |
end | |
</code> | |
If the mangle character needs to be changed, then a different character can be set by modifying the ''mangle_letter'' setting. | |
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<code> | |
begin act | |
int output_window_width 72 | |
end | |
</code> | |
For tools that use pretty-printing, this sets the output window width for a line break. | |
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==== Devices ==== | |
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In most technologies, circuits can be implemented with devices of different types. In CMOS, n-type and p-type transistors come in a number of flavors. Common flavors include standard threshold voltage, low threshold voltage, and high threshold voltage for core circuits. Special transistors can also exist that support higher voltages (typically used for I/O devices). Instead of building in these concepts into the library implementation, ACT permits flavor annotations in the circuit description. For example, an inverter with a low threshold voltage transistor implementation would be: | |
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<code> | |
prs { | |
in <10,lvt> -> out- | |
~in <20,lvt> -> out+ | |
} | |
</code> | |
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Here ''lvt'' is the transistor //flavor//. The list of valid flavors are specified in the ACT library: | |
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<code> | |
begin act | |
string_table dev_flavors "svt" "lvt" "hvt" | |
end | |
</code> | |
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The first flavor in the list (''svt'' in the example) is the default value if the flavor is unspecified. This means that | |
<code> | |
prs { | |
in <10,lvt> -> out- | |
~in <20> -> out+ | |
} | |
</code> | |
would use ''lvt'' for the ''in'' input to the pull-down network, but ''svt'' for the other devices needed. | |
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==== Specification directives ==== | |
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The ''spec'' language body can contain a list of directives associated with Booleans. The list of these directives is contained in the ACT configuration file: | |
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<code> | |
begin act | |
string_table spec_types "exclhi" "excllo" "mk_exclhi" "mk_excllo" | |
end | |
</code> | |
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These directives can be added as new tools that developed that might want additional information from the design. An example of using a directive is shown below: | |
<code> | |
bool a, b; | |
bool x[10]; | |
spec { | |
exclhi(a,b) | |
excllo(x) // this is excllo(x[0],x[1],...,x[9]) | |
} | |
</code> | |
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==== Attributes ==== | |
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===== Technology-specific configuration ===== | |
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The bulk of the configuration options are technology-specific. These are used to convert a technology-independent ACT description into a technology-specific output (e.g. a SPICE netlist). The standard set of configuration files we expect are: | |
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* ''prs2net.conf'': [[config:netlist|netlist]] generation configuration file, used to translate gate-level descriptions with abstract sizing into a transistor-level netlist. | Any configuration parameter can be over-ridden by using the ''-cnf=<file.conf>'' command-line option that is supposed by any ACT tool. While most technology-specific options are unlikely to need to be overridden, |
* ''layout.conf'': [[config:layout|Layout]] generation from netlist. | others (e.g. warnings, definitions of macros) may need [[config:runtime|user customization]]. |
* ''lint.conf'': [[config:lint|linting]] configuration for analyzing SPICE simulation traces. | |
* ''models.sp'': In the standard technology configuration directory, the file ''models.sp'' should exist if mixed-signal and analog modeling is to be used. This particular file should include the SPICE commands necessary to include all the device models needed for simulation. This is typically a single line of the form ''.lib "<path-to-models>" TT'' | |
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