Differences
This shows you the differences between two versions of the page.
| Both sides previous revisionPrevious revisionNext revision | Previous revision | ||
| intro_example:inverter [2020/04/29 18:38] – rajit | intro_example:inverter [2025/05/01 13:32] (current) – [Simulating with prsim] rajit | ||
|---|---|---|---|
| Line 4: | Line 4: | ||
| An inverter is a very simple process that has a one-bit digital input and one bit digital output. The following specifies a process that corresponds to one inverter. | An inverter is a very simple process that has a one-bit digital input and one bit digital output. The following specifies a process that corresponds to one inverter. | ||
| - | < | + | < |
| defproc inverter (bool? i; bool! o) | defproc inverter (bool? i; bool! o) | ||
| { | { | ||
| Line 15: | Line 15: | ||
| Let's start with the statements | Let's start with the statements | ||
| - | < | + | < |
| i -> o- | i -> o- | ||
| ~i -> o+ | ~i -> o+ | ||
| Line 33: | Line 33: | ||
| This is a combinational gate, which means either the pull-up or pull-down network is always conducting (alternatively, | This is a combinational gate, which means either the pull-up or pull-down network is always conducting (alternatively, | ||
| - | < | + | < |
| defproc inverter (bool? i; bool! o) | defproc inverter (bool? i; bool! o) | ||
| { | { | ||
| Line 47: | Line 47: | ||
| This fragment of ACT simply defines a process named '' | This fragment of ACT simply defines a process named '' | ||
| - | < | + | < |
| inverter inv; | inverter inv; | ||
| </ | </ | ||
| - | What can we do with this ACT file? The simplest thing is to simulate the inverter using a production-rule simulator. We have provided '' | + | Next, we can simulate the inverter using a production-rule simulator. We have provided '' |
| + | |||
| + | ===== Simulating with prsim ===== | ||
| + | |||
| + | The complete example is: | ||
| + | |||
| + | <code act> | ||
| + | defproc inverter (bool? i; bool! o) | ||
| + | { | ||
| + | prs { | ||
| + | i => o- | ||
| + | } | ||
| + | } | ||
| + | |||
| + | inverter inv; | ||
| + | </ | ||
| + | |||
| + | |||
| + | If the file above is called '' | ||
| + | |||
| + | < | ||
| + | % aflat test_inv.act > test_inv.prs | ||
| + | </ | ||
| + | |||
| + | The output file is the following: | ||
| + | |||
| + | < | ||
| + | " | ||
| + | ~" | ||
| + | </ | ||
| + | |||
| + | Note that ACT uses '' | ||
| + | |||
| + | If the file is saved as '' | ||
| + | |||
| + | < | ||
| + | % prsim test_inv.prs | ||
| + | |||
| + | (Prsim) initialize | ||
| + | (Prsim) watch inv.i | ||
| + | (Prsim) watch inv.o | ||
| + | (Prsim) status X | ||
| + | (Prsim) set inv.i 0 | ||
| + | (Prsim) cycle | ||
| + | (Prsim) set inv.i 1 | ||
| + | (Prsim) cycle | ||
| + | </ | ||
| + | |||
| + | '' | ||
| + | |||
| + | One of the useful features of '' | ||
| + | |||
| + | < | ||
| + | (Prsim) random | ||
| + | </ | ||
| + | |||
| + | After this command, all delays are randomized. This is a useful test to see if your production rules are stable and non-interfering. If '' | ||
| + | |||
| + | ===== Simulating with actsim ===== | ||
| + | |||
| + | ACTSIM is setup to simulate processes by default. We recommend having a top-level process that is used for testing purposes. In this setup, the complete example is: | ||
| + | |||
| + | <code act> | ||
| + | defproc inverter (bool? i; bool! o) | ||
| + | { | ||
| + | prs { | ||
| + | i => o- | ||
| + | } | ||
| + | } | ||
| + | |||
| + | defproc test() | ||
| + | { | ||
| + | inverter inv; | ||
| + | } | ||
| + | </ | ||
| + | |||
| + | If the file above is called '' | ||
| + | |||
| + | < | ||
| + | % actsim -p test test_inv.act | ||
| + | </ | ||
| + | |||
| + | Note that we don't need to generate the flattened production rule file, which could be quite large. We can simulate this as follows: | ||
| + | |||
| + | < | ||
| + | actsim> watch inv.i | ||
| + | actsim> watch inv.o | ||
| + | actsim> status X | ||
| + | inv { o } | ||
| + | actsim> set inv.i 0 | ||
| + | [ 0] < | ||
| + | actsim> cycle | ||
| + | [ 10] < | ||
| + | actsim> set inv.i 1 | ||
| + | [ 10] < | ||
| + | actsim> cycle | ||
| + | [ 20] < | ||
| + | </ | ||
| + | |||
| + | '' | ||
| + | |||
| + | One of the useful features of '' | ||
| + | |||
| + | < | ||
| + | actsim> random | ||
| + | </ | ||
| + | |||
| + | After this command, all delays are randomized. This is a useful test to see if your production rules are stable and non-interfering. If '' | ||