Differences
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| Next revision | Previous revision | ||
| intro_example:netlist [2020/06/17 03:27] – created prafull | intro_example:netlist [2022/05/13 13:22] (current) – rajit | ||
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| Line 3: | Line 3: | ||
| Files required: | Files required: | ||
| - | * inv.act | + | * {{ : |
| - | * inv.sp | + | |
| - | * test_inv.sp | + | |
| - | * on_c5n.sp | + | |
| === (1) Input file with gate sizing === | === (1) Input file with gate sizing === | ||
| - | < | + | The following '' |
| + | |||
| + | < | ||
| defproc inv (bool? i; bool! o) | defproc inv (bool? i; bool! o) | ||
| { | { | ||
| Line 37: | Line 36: | ||
| === (2) Creating SPICE netlist from ACT file === | === (2) Creating SPICE netlist from ACT file === | ||
| + | The '' | ||
| < | < | ||
| Line 50: | Line 50: | ||
| | | ||
| </ | </ | ||
| + | |||
| + | This tool can be used to create '' | ||
| < | < | ||
| $ prs2net -p " | $ prs2net -p " | ||
| </ | </ | ||
| + | |||
| + | The file looks like this: | ||
| < | < | ||
| Line 80: | Line 84: | ||
| === (3) Simulation with Xyce === | === (3) Simulation with Xyce === | ||
| + | |||
| + | A SPICE test harness that includes the models and inverter SPICE netlist is shown below. | ||
| < | < | ||
| Line 95: | Line 101: | ||
| ** include nfet and pfet models *** | ** include nfet and pfet models *** | ||
| - | .inc on_c5n.sp | + | .inc model.sp |
| *** include circuit model *** | *** include circuit model *** | ||
| Line 116: | Line 122: | ||
| < | < | ||
| - | $ xyce inv_test.sp | + | $ Xyce inv_test.sp |
| </ | </ | ||