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intro_example:start [2025/05/03 16:42] – [External tools] rajit | intro_example:start [2025/05/22 10:01] (current) – [Organizing your design] rajit | ||
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ACT supports the description of circuits are multiple levels of abstraction in a unified framework. Details of the language can be found in the [[language: | ACT supports the description of circuits are multiple levels of abstraction in a unified framework. Details of the language can be found in the [[language: | ||
- | ===== Simple circuit | + | ===== Circuit |
ACT can describe circuits are multiple levels of abstraction. At the highest level of abstraction, | ACT can describe circuits are multiple levels of abstraction. At the highest level of abstraction, | ||
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* A [[templates|parameterized adder]] using templates | * A [[templates|parameterized adder]] using templates | ||
* Dependent [[template_deps|templates]] | * Dependent [[template_deps|templates]] | ||
- | + | * Using [[standard_sim|standard testing environments]] | |
- | Simulating CHP programs often requires creating an environment to inject data into the circuit being tested, and an environment that reads the outputs of the circuit to check their values. '' | + | |
- | ===== Connections ===== | + | |
- | + | ||
- | Apart from variables used for parameters (e.g. '' | + | |
- | names for circuit components/ | + | |
- | <code act> | + | |
- | | + | |
- | </ | + | |
- | creates the variable '' | + | |
- | + | ||
- | Connecting two variables makes them refer to the same circuit element. Connecting two processes makes the two variables correspond to one process, and connecting two channels makes them the same channel. The two variables can be viewed as aliases, i.e. different ways to refer to the same process. | + | |
- | + | ||
- | ACT provides flexible syntax for connections | + | |
* [[loops|Loops]] and selections | * [[loops|Loops]] and selections | ||
*Other ways to write the [[intro_example: | *Other ways to write the [[intro_example: | ||
+ | * [[assertions|Assertions]] in parameterized definitions | ||
+ | * [[name_mangling|Expanded names]] in ACT | ||
+ | * Using [[.pure_struct|pure structures]] | ||
+ | * Defining [[.operators|operators]] | ||
- | ===== Pure structures ===== | ||
- | |||
- | [[language: | ||
- | |||
- | * Using [[.pure_struct|pure structures]] | ||
- | * Defining [[.operators|operators]] | ||
===== Organizing your design ===== | ===== Organizing your design ===== | ||
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* Creating [[namespace|libraries and namespaces]] | * Creating [[namespace|libraries and namespaces]] | ||
+ | * Organizing your [[files|files]] | ||
* Tracking [[dependencies|dependencies]] between ACT files | * Tracking [[dependencies|dependencies]] between ACT files | ||
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===== Low-level circuit design and SPICE simulation ===== | ===== Low-level circuit design and SPICE simulation ===== | ||
- | So far we have learned how to describe a circuit in ACT, simulate using prsim and irsim. Now, we will move on to the next stage i.e. designing CMOS circuits from ACT description. The process of designing circuit often starts with creating a spice netlist to simulate transistor-level circuit behavior. In order to generate a spice netlist, ACT requires some technology-dependent information and information to understand designer’s intent. We use configuration files to provide such information. For more information on configuration files, see [[config: | + | So far we have learned how to describe a circuit in ACT, simulate using actsim, |
The configuration files are saved in '' | The configuration files are saved in '' | ||
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* Specifying transistor [[sizing|sizes]] for CMOS implementation | * Specifying transistor [[sizing|sizes]] for CMOS implementation | ||
* Generating spice [[netlist|netlist]] and simulation with [[https:// | * Generating spice [[netlist|netlist]] and simulation with [[https:// | ||
+ | * [[name_mangling|Name mangling]] in ACT | ||
===== External tools ===== | ===== External tools ===== | ||