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+ | ====== Basic circuits ====== | ||
+ | - [[tutorial 1 - A simple inverter]] covering (production rules, prs block, defproc incl. in/out, instantiation, | ||
+ | - [[tutorial 2 - More combinational gates]] | ||
+ | - Creating [[namespace|libraries and namespaces]] | ||
+ | - [[bestpractices|Best practices]] for organizing a complex project | ||
+ | - Array, [[loops|loops]], | ||
+ | - Parameterized design using [[templates|templates]] | ||
+ | |||
+ | ====== Simple asynchronous circuits ====== | ||
+ | - Asynchronous data types and channels | ||
+ | - Dual rail logic gates | ||
+ | - Buffers | ||
+ | - QDI ripple-carry adder | ||
+ | - QDI FIFO | ||
+ | |||
+ | ====== Circuit design ====== | ||
+ | - [[configtut|Configuration]] file | ||
+ | - Specifying transistor [[sizing|sizes]] for CMOS implementation | ||
+ | - Generating spice [[netlist|netlist]] and simulation with [[https:// | ||
+ | - Spice simulation (details) | ||
+ | - Reset, power supply, and prs attributes | ||
+ | |||
+ | ====== Physical design ====== | ||
+ | - Configuration file | ||
+ | - Layout generation from netlist, Magic | ||
+ | - DRC, LVP | ||
+ | - Extraction and spice simulation | ||