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scratch:start [2020/06/17 03:30] prafullscratch:start [2025/08/01 13:54] (current) – [Physical design] rajit
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 ====== Basic circuits ====== ====== Basic circuits ======
-    - A simple inverter +    - [[tutorial 1 - A simple inverter]] covering (production rules, prs block, defproc incl. in/out, instantiation, aflat and prsim) 
-    - More combinational gates+    - [[tutorial 2 - More combinational gates]]
     - Creating [[namespace|libraries and namespaces]]     - Creating [[namespace|libraries and namespaces]]
       - [[bestpractices|Best practices]] for organizing a complex project       - [[bestpractices|Best practices]] for organizing a complex project
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     - Buffers     - Buffers
     - QDI ripple-carry adder     - QDI ripple-carry adder
-    - +    - QDI FIFO
  
 ====== Circuit design ====== ====== Circuit design ======
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     - Generating spice [[netlist|netlist]] and simulation with [[https://xyce.sandia.gov/about_xyce/index.html|Xyce]]     - Generating spice [[netlist|netlist]] and simulation with [[https://xyce.sandia.gov/about_xyce/index.html|Xyce]]
     - Spice simulation (details)     - Spice simulation (details)
-    - +    - Reset, power supply, and prs attributes
  
 ====== Physical design ====== ====== Physical design ======
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     - DRC, LVP     - DRC, LVP
     - Extraction and spice simulation     - Extraction and spice simulation
 +
 +<block 75:0:yellow;rounded>test</block>
 +
 +<block 75%:c:#FFFF00;black;1px solid black;8pt,rounded>abc</block>
 +
 +<block 80:10:#66FF00;black;4px solid black;/8ptpt>test me</block>
 +
 +<block 80:10:white;black;1px solid black;Helvetica/14px>another test</block>
 +
 +<block 80:10:#CCFF66;black;4px solid black;auto/6pt>Default and auto</block>
 +
 +<block 80:10:#CCFF66;black;4px solid black;auto/10ptpt>Default and auto2</block>