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| ====== The ACT VLSI Design Tools ====== | ====== The ACT VLSI Design Tools ====== | ||
| - | Welcome to the Wiki for the ACT suite of VLSI design tools. ACT is an **A**synchronous **C**ircuit **T**oolkit which has been built from scratch to support the design and implementation of asynchronous logic. While that is the main goal, some of the tools we have developed | + | Welcome to the Wiki for the ACT suite of VLSI design tools. ACT is an **A**synchronous **C**ircuit **T**oolkit which has been built from scratch to support the design and implementation of asynchronous logic. While that is the main goal, the tools we have developed also support |
| When an existing open-source tool used by mainstream chip designers can be re-purposed for asynchronous design without major issues (in terms of functionality as well as error-prone behavior), we re-use it. Examples include layout editors (e.g. '' | When an existing open-source tool used by mainstream chip designers can be re-purposed for asynchronous design without major issues (in terms of functionality as well as error-prone behavior), we re-use it. Examples include layout editors (e.g. '' | ||
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| * [[install|ACT]]: | * [[install|ACT]]: | ||
| - | We also have a [[summer2024: | + | We also have a [[summer2024: |
| If you are a Homebrew user, check out the [[https:// | If you are a Homebrew user, check out the [[https:// | ||
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| * [[language: | * [[language: | ||
| * [[history: | * [[history: | ||
| + | |||
| ===== ACT library ===== | ===== ACT library ===== | ||
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| * [[sim: | * [[sim: | ||
| - | For those interested in writing tools, we have some documentation available for the core ACT library and data structures. | ||
| - | * [[http:// | ||
| - | * [[guide: | ||
| - | * [[guide: | ||
| ===== Tools ===== | ===== Tools ===== | ||
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| Rajit Manohar. {{ :: | Rajit Manohar. {{ :: | ||
| - | If you use the ACT tools for a publication, | ||
| - | Samira Ataei, Wenmian Hua, Yihang Yang, Rajit Manohar, Yi-Shan Lu, Jiayuan He, Sepideh Maleki, Keshav Pingali. An Open-Source EDA Flow for Asynchronous Logic. IEEE Design & Test, Volume 38, Issue 2, pages 27-37, April 2021. | ||
| - | DOI: 10.1109/ | ||
| For analog circuit simulation, we primarily use the open-source [[https:// | For analog circuit simulation, we primarily use the open-source [[https:// | ||
| + | |||
| + | For those interested in writing tools, we have some documentation available for the core ACT library and data structures. | ||
| + | |||
| + | * [[http:// | ||
| + | * [[guide: | ||
| + | * [[guide: | ||
| ===== Community ===== | ===== Community ===== | ||
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| We have a [[http:// | We have a [[http:// | ||
| + | We'd like to [[thank|thank]] a number of external users who have contributed either directly or indirectly to the documentation via questions, corrections, | ||
| + | |||
| + | ---- | ||
| + | |||
| + | If you use the ACT tools for a publication, | ||
| + | |||
| + | Samira Ataei, Wenmian Hua, Yihang Yang, Rajit Manohar, Yi-Shan Lu, Jiayuan He, Sepideh Maleki, Keshav Pingali. An Open-Source EDA Flow for Asynchronous Logic. IEEE Design & Test, Volume 38, Issue 2, pages 27-37, April 2021. | ||
| + | DOI: 10.1109/ | ||
| + | |||
| + | ---- | ||
| + | //This site uses a slightly [[argonchanges|modified]] dokuwiki template.// | ||