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start [2026/04/19 13:41] – rajitstart [2026/04/19 13:50] (current) – [Installation] rajit
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       * [[install|ACT]]: use this if you only want the core language and some basic tools for custom circuit design. The [[install_actflow|actflow build]] installs this repository as well.       * [[install|ACT]]: use this if you only want the core language and some basic tools for custom circuit design. The [[install_actflow|actflow build]] installs this repository as well.
  
-We also have a [[summer2024:dockersetup|docker container]] that contains the tools, if you'd like to try them out without installing them on your system. +We also have a [[summer2024:dockersetup|docker container]] that contains the tools, if you'd like to try them out without installing them on your system. 
 If you are a Homebrew user, check out the [[https://github.com/asyncvlsi/homebrew-tap|homebrew tap]] for the tools. If you are a Homebrew user, check out the [[https://github.com/asyncvlsi/homebrew-tap|homebrew tap]] for the tools.
  
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   * [[language:migrate|Migration guide]] from the older (pre-2018) version of ACT   * [[language:migrate|Migration guide]] from the older (pre-2018) version of ACT
   * [[history:|Language history/lineage]]   * [[history:|Language history/lineage]]
 +
 ===== ACT library ===== ===== ACT library =====
  
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   * [[sim:|Simulation library]], installed together with [[tools:actsim|actsim]]; It provides tools for simulation and verification   * [[sim:|Simulation library]], installed together with [[tools:actsim|actsim]]; It provides tools for simulation and verification
  
-For those interested in writing tools, we have some documentation available for the core ACT library and data structures. 
  
-  * [[http://avlsi.csl.yale.edu/act_docs/|ACT data structures]] (work in progress!) 
-  * [[guide:|Using ACT data structures]] 
-  * [[guide:makefile|Using the standard Makefiles]] in ACT 
 ===== Tools ===== ===== Tools =====
  
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 For analog circuit simulation, we primarily use the open-source [[https://github.com/Xyce/Xyce|Xyce]] simulator from Sandia Labs. For analog circuit simulation, we primarily use the open-source [[https://github.com/Xyce/Xyce|Xyce]] simulator from Sandia Labs.
 +
 +For those interested in writing tools, we have some documentation available for the core ACT library and data structures.
 +
 +  * [[http://avlsi.csl.yale.edu/act_docs/|ACT data structures]] (work in progress!)
 +  * [[guide:|Using ACT data structures]]
 +  * [[guide:makefile|Using the standard Makefiles]] in ACT
  
 ===== Community ===== ===== Community =====
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 We'd like to [[thank|thank]] a number of external users who have contributed either directly or indirectly to the documentation via questions, corrections, clarifications, etc.  We'd like to [[thank|thank]] a number of external users who have contributed either directly or indirectly to the documentation via questions, corrections, clarifications, etc. 
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 Samira Ataei, Wenmian Hua, Yihang Yang, Rajit Manohar, Yi-Shan Lu, Jiayuan He, Sepideh Maleki, Keshav Pingali. An Open-Source EDA Flow for Asynchronous Logic. IEEE Design & Test, Volume 38, Issue 2, pages 27-37, April 2021.  Samira Ataei, Wenmian Hua, Yihang Yang, Rajit Manohar, Yi-Shan Lu, Jiayuan He, Sepideh Maleki, Keshav Pingali. An Open-Source EDA Flow for Asynchronous Logic. IEEE Design & Test, Volume 38, Issue 2, pages 27-37, April 2021. 
 DOI: 10.1109/MDAT.2021.3051334. DOI: 10.1109/MDAT.2021.3051334.
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start.1776606100.txt.gz · Last modified: by rajit
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