The custom flow is for designing, simulating, and verifying hand-designed/optimized circuits.
In the standard custom circuit flow using ACT, there are two basic parts:
prs2net
tool for analog simulation. This converts a hierarchical ACT design into a hierarchical spice netlist.irsim
or cosmos
using prs2sim
, which converts the hierarchical ACT design into a flat simulation file (.sim
and .al
) that can be read by irsim
/cosmos
.prsim
tool.magic
VLSI layout editor.:extract
ed from from magic
to create a .ext
file. This contains the layout information and parasitics. ext2sim
(an external tool in older versions, but a built-in command in version 8.x). This can be simulated using irsim
/cosmos
as well.gemini
tool can be used for strict transistor-level comparison between the .sim
file generated from the layout, and the .sim
file created from the .act
file (prs2sim
)lvp
tool can be used to compare that the layout matches the production rules used to specify the logic. This tool does not check width/length of transistors, but rather checks that the gates are logically equivalent. It also requires all signals to be named consistently in the layout and ACT file.