Members of the asynchronous VLSI and architecture group have been making numerous contributions to the code base. Some have implemented key pieces of the toolflow; others are regular users and have found innumerable bugs and limitations that triggered improvements to the code base and enhancements to functionality. The contributors have been:

• Former and current members of the AVLSI group, as well as some of our collaborators
• Prof. Keshav Pingali's group at UT Austin, who collaborated on some of the core physical design tools.
• Students taking ECE 4260/CPSC 4480/ENAS 8760 (Silicon Compilation) at Yale, especially the early iterations in 2018, 2019 during the early development of the current set of tools.

Specific authors can be determined from the git logs.

Many individuals have provided assistance either via contributing documentation, asking questions that led to documentation updates, or finding bugs in the writeup. Thank you for your help!