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--- asic:timing:constraints [2023/11/22 07:40]
rajit
+++ asic:timing:constraints [2024/03/21 13:36] (current)
rajit
@@ Line 18: / Line 18: @@
 Both interpretations are valid, and it is up to a designer to determine what action is most appropriate to correct the timing fork violation. A simple option would be to slow down the path that is too fast, but this may lead to a slower cycle period.
+When identifying paths from one timing graph vertex to another,  Cyclone will only traverse //unticked// edges. So, for the example above, path searching will stop when it encounters a ticked edge. There are also cases when this may be insufficient, and the paths of interest must have exactly one ticked edge on them.  The following example shows this scenario:
+<code act>
+spec {
+  timing a+ : b*- < c+
+}
+</code>
+Here, the paths considered from ''a+'' to ''b-'' must have exactly one tick on them, while the paths from ''a+'' to ''c+'' have no ticks on them. (The asterisk can appear on ''b'', ''c'', or both.)