Differences

This shows you the differences between two versions of the page.

--- asic:timing:start [2023/11/25 06:55]
rajit [Timing]
+++ asic:timing:start [2024/03/22 16:06] (current)
rajit [Creating the timing graph]
@@ Line 22: / Line 22: @@
+==== Creating the timing graph ====
+There are two ways to create a timing graph:
+   - When the design is fully specified in ACT and production rules are specified using cells that are auto-extracted by the ACT tools (e.g. using the ''ckt:cell-map'' command), the timing arcs from each cell are computed from the production rules directly. These arcs are checked against the ''.lib'' file, and an error is reported if the timing arc is missing from the ''.lib''.
+   - When the design has user-specified cells/black box cells, then ACT assumes that timing arcs could potentially relate any input pin of the cell to any output pin, and the arcs are computed based on those specified in the ''.lib'' file.
+Delays and transition times are added to the timing graph using information in the ''.lib'' file. Commands to read in ''.lib'' files are:
+^ Command ^ Meaning  ^
+| timer:lib-read <file> | This command reads in a timing ''.lib'' file, and returns a handle. This handle is used to refer to the information from the ''lib'' file that was read by the timing engine. |
+| timer:lib-merge <lh> <file> | This command takes an existing lib handle <lh>, and adds the contents of the ''.lib'' file to the handle |
+==== Reading in parasitics ====
 ===== Power =====