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intro_example:netlist [2020/06/16 23:27]
prafull created
intro_example:netlist [2022/05/13 09:22] (current)
rajit
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 Files required: Files required:
-  * inv.act +  * {{ :intro_example:model.sp |Simple BSIM3 model file}} from a (very old) MOSIS SCMOS_SUBM 0.6um run, from a time when everything was publicly posted. Save this to ''model.sp''
-  * inv.sp +
-  * test_inv.sp +
-  * on_c5n.sp+
  
  
 === (1) Input file with gate sizing === === (1) Input file with gate sizing ===
  
-<code>+The following ''inv.act'' file will be used as a test case for SPICE simulation. 
 + 
 +<code act>
 defproc inv (bool? i; bool! o) defproc inv (bool? i; bool! o)
 { {
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 === (2) Creating SPICE netlist from ACT file === === (2) Creating SPICE netlist from ACT file ===
  
 +The ''prs2net'' tool can be used to create a SPICE netlist from the ACT file.
  
 <code> <code>
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  -S         Enable shared long-channel devices in staticizers  -S         Enable shared long-channel devices in staticizers
 </code> </code>
 +
 +This tool can be used to create ''inv.sp'' as follows:
  
 <code> <code>
 $ prs2net -p "INVX1<>" -o inv.sp inv.act $ prs2net -p "INVX1<>" -o inv.sp inv.act
 </code> </code>
 +
 +The file looks like this:
  
 <code> <code>
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 === (3) Simulation with Xyce === === (3) Simulation with Xyce ===
 +
 +A SPICE test harness that includes the models and inverter SPICE netlist is shown below.
  
 <code> <code>
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 ** include nfet and pfet models *** ** include nfet and pfet models ***
-.inc on_c5n.sp+.inc model.sp
  
 *** include circuit model *** *** include circuit model ***
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 <code> <code>
-xyce inv_test.sp+Xyce inv_test.sp
 </code> </code>