Differences

This shows you the differences between two versions of the page.

--- summer2022:start [2022/06/19 14:36]
rajit [Week 3: Physical design]
+++ summer2022:start [2022/06/21 16:40] (current)
rajit [ASYNC 2022 Summer School]
@@ Line 1: / Line 1: @@
 ====== ASYNC 2022 Summer School ======
-Welcome to the ASYNC 2022 Summer School!
+Welcome to the ASYNC 2022 Summer School! Additional reference material that describes some of the topics presented in more detail  are also [[summer2022:references|available]].
 ===== Week 1 : Behavioral design =====
@@ Line 13: / Line 12: @@
 | 9:00am | Opening remarks | Ivan Sutherland | [[https://avlsi.csl.yale.edu/act/lib/videos/summer2022/00_Ivan_Welcome_ASYNC_Summerschool_2022_small.mp4|mp4]] |
 | 9:10am | {{ :summer2022:02_summerschoolintro.pdf |Introduction to asynchronous design}} ({{ :summer2022:01_logistics.pdf |logistics}})| Rajit Manohar  | [[https://avlsi.csl.yale.edu/act/lib/videos/summer2022/02_SummerSchoolIntro_small.mp4|mp4]] |
-| 9:40am |  //break//  ||
+| 9:40am |  //break//  |||
 | 9:45am | {{ :summer2022:03_chpintro.pdf |Behavioral design using message-passing (CHP)}} | Rajit Manohar |  [[https://avlsi.csl.yale.edu/act/lib/videos/summer2022/03_chp_intro.mp4|mp4]]  |
-| 10:15am |  //break//  ||
+| 10:15am |  //break//  |||
 | 10:20am | CHP examples | Rajit Manohar  | [[https://avlsi.csl.yale.edu/act/lib/videos/summer2022/03b_chp_example.mp4|mp4]] |
 | 10:30am | Simulating CHP using ''actsim'' {{ :summer2022:chp_eg.tgz |live examples}}| ::: | [[https://avlsi.csl.yale.edu/act/lib/videos/summer2022/03c_chp_demos.mp4|mp4]]  |
-| 10:55am |  //break//  ||
+| 10:55am |  //break//  |||
 | 11:00am | {{ :summer2022:04_dataflow.pdf |Dataflow asynchronous design and pipeline performance}} | Benjamin Hill | [[https://avlsi.csl.yale.edu/act/lib/videos/summer2022/04_dataflow.mp4|mp4]]  |
 | 11:45am | Simulating dataflow using ''actsim'' and ''dflowmap'' | ::: |
@@ Line 44: / Line 43: @@
 | 9:00am | {{ :summer2022:10_week1recap.pdf |Welcome and intro to gates}} | Rajit Manohar | [[https://avlsi.csl.yale.edu/act/lib/videos/summer2022/10_Week1Recap.mp4|mp4]] |
 | 9:15am | {{ :summer2022:11_linkjoint_part2_async_summerschool_2022_handout_4pp.pdf |Links and Joints Part 2: gate level design}} | Marly Roncken, Ebele Esimai, Ivan Sutherland | [[https://avlsi.csl.yale.edu/act/lib/videos/summer2022/11_LinkJoint_Part2_ASYNC_SummerSchool_2022_Video.mp4|mp4]] |
-| 10:15am |  //break//  ||
+| 10:15am |  //break//  |||
 | 10:20am | Examples: simulating gates  {{ :summer2022:sim_gates.tgz |sim_gates.tgz}}| Rajit Manohar | [[https://avlsi.csl.yale.edu/act/lib/videos/summer2022/11a_gatesim_small.mp4|mp4]] |
 | 10:30am | {{ :summer2022:12_montek-async-summer-school-2022.pdf |Dataflow: gate level design}} {{ :summer2022:dflow.tgz |mousetrap FIFO}}| Montek Singh | [[https://avlsi.csl.yale.edu/act/lib/videos/summer2022/12_montek_async_summerschool2022.mp4|mp4]] [[https://avlsi.csl.yale.edu/act/lib/videos/summer2022/12a_dataflow_eg.mp4|examples mp4]] |
-|  11:35am |  //break//  ||
+|  11:35am |  //break//  |||
 |  11:40am  | {{ :summer2022:13_syntaxdirected.pdf |Syntax-directed translation}} | Rajit Manohar | [[https://avlsi.csl.yale.edu/act/lib/videos/summer2022/13_SyntaxDirected.mp4|mp4]] |
 | 12:10pm  | Examples | ::: | [[https://avlsi.csl.yale.edu/act/lib/videos/summer2022/13a_sdt_eg.mp4|mp4]] |
-| 12:25pm |  //break//  ||
+| 12:25pm |  //break//  |||
 | 12:30pm | {{ :summer2022:14_nondet.pdf |Non-deterministic constructs}} | Rajit Manohar | [[https://avlsi.csl.yale.edu/act/lib/videos/summer2022/14_Nondet.mp4|mp4]] |
 | 12:50pm | Q&A and final remarks | ::: | [[https://avlsi.csl.yale.edu/act/lib/videos/summer2022/15_final_QA.mp4|mp4]] |
@@ Line 68: / Line 67: @@
 **Monday, June 20, 9:00AM to 1:00PM Eastern Time**
-^ Time ^ Topic ^ Speaker ^
+(If the video is not visible when you click on the link, try downloading the file and viewing it locally.)
-| 9:00am | {{ :summer2022:20_timingconstraints.pdf |Timing constraints}} | Rajit Manohar |
-| 9:30am | Examples | ::: |
+^ Time ^ Topic ^ Speaker ^ Video ^
+| 9:00am | {{ :summer2022:20_timingconstraints.pdf |Timing constraints}} | Rajit Manohar | [[https://avlsi.csl.yale.edu/act/lib/videos/summer2022/20_timing.mp4|mp4]] |
+| 9:30am | {{ :summer2022:timing.eg.tgz |Examples}} | ::: | [[https://avlsi.csl.yale.edu/act/lib/videos/summer2022/20a_example1.mp4|mp4]] |
 | 9:40am | //break// ||
-| 9:45am | Custom circuit design | Benjamin Hill |
+| 9:45am | {{ :summer2022:21_customdesign.pdf |Custom circuit design}} | Benjamin Hill | [[https://avlsi.csl.yale.edu/act/lib/videos/summer2022/21_customdesign.mp4|mp4]] |
 | 10:45am | //break// ||
-| 10:50am | The ASIC flow: mapping to cells | Rajit Manohar |
+| 10:50am | {{ :summer2022:22_asicflow.pdf |The ASIC flow: mapping to cells}} | Rajit Manohar | [[https://avlsi.csl.yale.edu/act/lib/videos/summer2022/22_asicflow.mp4|mp4]] |
-| 11:10am | Example: cell mapping | ::: |
+| 11:10am | Example: {{ :summer2022:cell.eg.tgz |cell mapping}} | ::: | [[https://avlsi.csl.yale.edu/act/lib/videos/summer2022/22a_examples2.mp4|mp4]] |
 | 11:25am | //break// ||
-| 11:30am | Example: layout configuration | Rajit Manohar |
+| 11:30am | Example: layout configuration, cell generation | Rajit Manohar |  [[https://avlsi.csl.yale.edu/act/lib/videos/summer2022/23_cellgeneration.mp4|mp4]] |
-| 11:45am | Example: cell generation | ::: |
 | 11:55am | //break// ||
-| 12:00pm | Example: place and route flow | Rajit Manohar |
+| 12:00pm | Example: {{ :summer2022:flow.eg.tgz |place and route flow}} | Rajit Manohar | [[https://avlsi.csl.yale.edu/act/lib/videos/summer2022/24_pandr.mp4|mp4]] |
 | 12:30pm | //break// ||
-| 12:35pm | Next steps | all |
+| 12:35pm | Next steps | all | [[https://avlsi.csl.yale.edu/act/lib/videos/summer2022/25_finalQandA.mp4|mp4]] |
@@ Line 92: / Line 92: @@
    * Wed June 22, 11:00am to 1:00pm Eastern
+      * Ruslan, Nicolas, Rajit
    * Wed June 22,  9:00pm to 11:00pm Eastern