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ASYNC 2026 Summer School
The 3rd edition of the ASYNC Summer school will be co-located directly before the conference (June 1-2 2026) as a hybrid event at DTU in Lyngby, Denmark.
The goal of the school is to teach asynchronous chip design to students and practitioners interested in digital hardware design. Participants will learn how to design asynchronous circuits at the behavioral level, gate level, and physical design level using design automation tools.
Call for participation to the community: we are searching for additional lectures, please contact the summer school chairs to discuss further!
The program is still in development, please check for updates!
Session 1: Behavioral design
Monday, June 1 morning
This session covers the abstractions used for the behavioral description of asynchronous circuits, and how one can use simulation at this level of abstraction to test the functionality of an asynchronous design.
- Overview of summer school + introduction to async
- Behavioral design with message-passing
- Dataflow Design
- Design with High Level Synthesis
Session 2: From Behavior to gates
Monday, June 1 afternoon
This session covers systematic techniques to translate the detailed signal-level description of an asynchronous computation into gates.
- Handshake Protocols
- Synthesis and Cells
- Syntax Directed Translation
Session 3: Physical design
Tuesday, June 2 morning
This session covers mapping a gate-level description of a design into a physical implementation.
- Timing and Static timing analysis
- Cell mapping
- Place and Route
Session 4: Special topics
Tuesday, June 2 afternoon
We will include special topics, and close out with a social event in the evening.