The ACT VLSI design tools

start - [Session 2: From Behavior to gates]

rajit (rajit@undisclosed.example.com) — 2026-05-27T20:05:09+00:00

ASYNC 2026 Summer School The 3rd edition of the ASYNC Summer school will be co-located directly before the conference (June 1-2 2026) as a hybrid event at DTU in Lyngby, Denmark. The goal of the school is to teach asynchronous chip design to students and practitioners interested in digital hardware design. Participants will learn how to design asynchronous circuits at the behavioral level, gate level, and physical design level using design automation tools.

thank - [Internal Contributors]

rajit (rajit@undisclosed.example.com) — 2026-05-20T20:20:27+00:00

Internal Contributors Members of the asynchronous VLSI and architecture group have been making numerous contributions to the code base. Some have implemented key pieces of the toolflow; others are regular users and have found innumerable bugs and limitations that triggered improvements to the code base and enhancements to functionality. The contributors have been:

start - [The core language]

rajit (rajit@undisclosed.example.com) — 2026-05-20T11:15:07+00:00

Language history This is a rough chronology of the influences from the literature on the ACT language. * 1975 E.W. Dijkstra's paper on a guarded command language appears in CACM * 1978 C.A.R. Hoare's paper on CSP appears in CACM * 1986 A.J. Martin describes an approach to translating communicating processes into asynchronous circuits in a

prs - [Grouping for cell generation]

rajit (rajit@undisclosed.example.com) — 2026-05-19T19:12:52+00:00

The prs sublanguage The prs sublanguage is used to specify production rules. Production rules are the syntax used by ACT to specify pull-up and pull-down networks for a gate. For example, an inverter with input a and output b would be specified by the following production rule:

dflow - [Initial tokens]

rajit (rajit@undisclosed.example.com) — 2026-05-19T10:30:45+00:00

The dataflow sublanguage The dataflow sublanguage provides a convenient short-hand when designing asynchronous circuits using pipelined asynchronous circuits. The dataflow language operates exclusively on channels, and treats channels as variables to specify the dataflow computation.

chp - [An example]

rajit (rajit@undisclosed.example.com) — 2026-05-13T20:44:31+00:00

The chp sublanguage The CHP sublanguage is an evolution of Dijkstra's guarded commands notation and Hoare's CSP. It is a programming notation augmented with send/receive primitives for communication and parallel composition. A chp program is specified in ACT as follows:

start - [Logic synthesis]

rajit (rajit@undisclosed.example.com) — 2026-05-10T12:04:11+00:00

ACT ASIC flow The ASIC flow for asynchronous logic provided by the actflow repository includes a number of different components. The key components provided are those that require something different in the case of asynchronous design. For the remaining tools, we use the same tools as synchronous logic as there is no significant difference.

netgen - [Attributes]

rajit (rajit@undisclosed.example.com) — 2026-05-07T17:33:40+00:00

prs2net: automated netlist generation The tool prs2net can be used to automatically generate a hierarchical spice netlist from an .act file. Parameters that control defaults and the output format are specified in a configuration file. The overall way the tool works is as follows. First, it reads in the

actsim - [Manipulating internal variables]

rajit (rajit@undisclosed.example.com) — 2026-05-03T17:00:48+00:00

Actsim: an ACT simulator To run actsim, you need to select the ACT file to simulate and the top-level process for your design: % actsim file.act process actsim> A simple example The following ACT file is a CHP example that sends three integers on an output channel, and connects that process to one that simply receives an integer and displays it to the screen.

prog_compare.png - created

karthi (karthi@undisclosed.example.com) — 2025-10-14T02:07:27+00:00

customdesign2024.pdf

ben (ben@undisclosed.example.com) — 2024-07-15T16:06:48+00:00

async_lib.pdf

rajit (rajit@undisclosed.example.com) — 2024-07-15T14:39:42+00:00

custom_design.tgz - created

ben (ben@undisclosed.example.com) — 2024-07-15T11:42:36+00:00

asynchronous_design_methodology_using_act_with_commercial_tools.pdf - created

rajit (rajit@undisclosed.example.com) — 2024-07-14T14:38:43+00:00

20_intro.pdf - created

rajit (rajit@undisclosed.example.com) — 2024-07-14T14:38:43+00:00

async_school_2024_-_petri_nets_-_yakovlev_1.0.pdf - created

rajit (rajit@undisclosed.example.com) — 2024-07-12T14:47:19+00:00

petri_nets_primer_-_async_summer_school_2024_-_yakovlev_1.0.pdf - created

rajit (rajit@undisclosed.example.com) — 2024-07-12T14:47:19+00:00

petri_intro.pdf - created

rajit (rajit@undisclosed.example.com) — 2024-07-12T14:47:19+00:00

pipe.tgz - created

rajit (rajit@undisclosed.example.com) — 2024-07-09T10:17:02+00:00

sdt.tgz - created

rajit (rajit@undisclosed.example.com) — 2024-07-09T10:17:02+00:00