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tools:actsim [2023/04/14 14:47] rajit [Example with a test environment] |
tools:actsim [2023/04/14 15:33] rajit [Mixed-signal simulation] |
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} | } | ||
</ | </ | ||
+ | |||
+ | ==== Direct environment in ACT ==== | ||
A simple test environment would look like this: | A simple test environment would look like this: | ||
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Running '' | Running '' | ||
- | Since this is a commonly-used approach, the [[stdlib: | + | Since this is a commonly-used approach, the [[stdlib: |
+ | |||
+ | ==== Using pre-defined sources and sinks with data in the ACT file ==== | ||
+ | |||
+ | The same example can be written using the helper processes provided as follows: | ||
<file act testadd2.act> | <file act testadd2.act> | ||
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adder a; | adder a; | ||
sim:: | sim:: | ||
- | | + | |
- | 3, // three data values | + | 3, // three data values |
- | {3, | + | {3, |
- | > s1(a.A); | + | > s1(a.A); |
sim:: | sim:: | ||
sim:: | sim:: | ||
- | | + | |
- | > sx(a.C); | + | > sx(a.C); |
} | } | ||
</ | </ | ||
+ | ==== Using files for test data ==== | ||
+ | |||
+ | Instead of providing the data values in the ACT test environment, | ||
+ | |||
+ | <file act testadd3.act> | ||
+ | import " | ||
+ | import sim; // import simulation namespace | ||
+ | |||
+ | defproc test() | ||
+ | { | ||
+ | adder a; | ||
+ | // The first parameter is the file ID (default name is _infile_.0). | ||
+ | // The second parameter is whether the file should be looped. | ||
+ | // The third parameter is the bit-width. | ||
+ | sim:: | ||
+ | | ||
+ | // This could also use a file source | ||
+ | sim:: | ||
+ | sim:: | ||
+ | 32 // 32-bit | ||
+ | > sx(a.C); | ||
+ | } | ||
+ | </ | ||
===== Mixed-signal simulations ===== | ===== Mixed-signal simulations ===== | ||
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===== Configuration file ===== | ===== Configuration file ===== | ||
+ | An ACT configuration file can be read into '' | ||
+ | |||
+ | |||
+ | ==== CHP configuration options ==== | ||
+ | |||
+ | < | ||
+ | begin sim | ||
+ | begin chp | ||
+ | int inf_loop_opt 0 | ||
+ | end | ||
+ | end | ||
+ | </ | ||
+ | '' | ||
+ | |||
+ | < | ||
+ | begin sim | ||
+ | begin chp | ||
+ | int default_delay 0 | ||
+ | real default_leakage 0 | ||
+ | int default_area 0 | ||
+ | end | ||
+ | end | ||
+ | </ | ||
+ | These set default simulation parameters for CHP processes. The default delay sets the value for each non-skip basic statement (send, receive, assignment) in a CHP program. The default leakage per process can be secified (in nW), as can the default area (in square microns). | ||
+ | |||
+ | < | ||
+ | begin sim | ||
+ | begin chp | ||
+ | int debug_metrics 0 | ||
+ | end | ||
+ | end | ||
+ | </ | ||
+ | If this is set to 1, then debugging messages are printed out showing the metrics that '' | ||
+ | |||
+ | ==== Mixed-signal simulation ==== | ||
+ | |||
+ | The mixed-signal simulation parameters are used to configure the interface to Xyce, and are contained in a sim.device block. | ||
+ | < | ||
+ | begin sim | ||
+ | begin device | ||
+ | # put mixed-signal parameters here | ||
+ | end | ||
+ | end | ||
+ | </ | ||
+ | The parameters are | ||
+ | < | ||
+ | real timescale 1e-12 | ||
+ | </ | ||
+ | This is used for the time resolution of the Xyce output trace files, if any. | ||
+ | |||
+ | < | ||
+ | sim.device.analog_window | ||
+ | sim.device.case_for_sim | ||
+ | sim.device.settling_time | ||
+ | sim.device.dump_all | ||
+ | sim.device.output_format | ||
+ | sim.device.waveform_steps | ||
+ | sim.device.waveform_time | ||
+ | sim.device.model_files | ||
+ | sim.device.outfile | ||
+ | sim.device.stop_time | ||
+ | </ | ||
+ | |||
+ | |||
+ | ==== Standard sim namespace helper functions ==== | ||
+ | |||
+ | The standard simulation library (in the sim namespace) uses a few configuration file settings to pick the names | ||
+ | of the files for I/O. | ||
+ | |||
+ | < | ||
+ | begin sim | ||
+ | begin file | ||
+ | string prefix " | ||
+ | end | ||
+ | end | ||
+ | </ | ||
+ | Change this parameter to modify the default file names used by the file I/O library used by the standard simulation namespace. | ||
+ | |||
+ | Alternatively, | ||
+ | < | ||
+ | begin sim | ||
+ | begin file | ||
+ | string_table name_table " | ||
+ | end | ||
+ | end | ||
+ | </ | ||
+ | If this parameter is specified, then the prefix parameter is ignored. | ||