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asic:timing:cells [2023/11/18 20:54] rajitasic:timing:cells [2024/05/31 18:37] (current) rajit
Line 13: Line 13:
 would correspond to the function would correspond to the function
 <code> <code>
-function: "~& ~| ~(a&b)&c"+function: "!a*!+ c*!(a*b)"
 </code> </code>
 +We use the same approach for latches as well.
 +
 +The [[https://github.com/asyncvlsi/actflow|actflow]]  repository includes [[https://csl.yale.edu/~rajit/ps/xcell.pdf|''xcell'']], which is a [[asic:timing:xcell:start|cell library characterization tool]] that generates ''.lib'' files that can be handled by Cyclone. The tool takes a list of ACT cell definitions and runs a large number of SPICE simulations to compute delay and power tables.