Differences

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--- config:netlist [2023/04/15 11:24] – [Device generation and parameters] rajit
+++ config:netlist [2025/05/24 13:27] (current) – [Device generation and parameters] rajit
@@ Line 6: / Line 6: @@
 <code>
-real lambda 0.03e-6
+real lambda 0.3e-6
 </code>
-This is the scale factor used to convert to metric units from the dimensionless transistor sizes.
+This is the scale factor used to convert to metric units from the dimensionless transistor sizes. This is normally set to F/2, where F is the feature size. In this example, we are assuming a 0.6 micron feature size.
 ===== Device generation and parameters =====
@@ Line 97: / Line 96: @@
 real default_load_cap 0
 </code>
-This value (in fF) is added to a node whenever it appears on the RHS of a production rule (per subcircuit). This can be used to "pessimize" your spice simulations to account for wiring capacitance. This can be overridden with the "loadcap=value" attribute in the production rule itself.
+This value (in fF) is added to a node whenever it appears on the RHS of a production rule (per subcircuit). This can be used to "pessimize" your spice simulations to account for wiring capacitance. This can be overridden with the "loadcap=value" attribute in the production rule itself. Since these capacitance values aren't explicit capacitors in the layout, it is convenient to be able to emit a netlist that omits these capacitance values entirely. To do so, the ''ignore_loadcap'' parameter can be set.
+<code>
+int ignore_loadcap 0
+</code>
+Setting it to one will omit the capacitance devices. This option is set by ''prs2net'' when the command-line option ''-l'' is used.
 <code>
-real unit_cap 1e-15
+real unit_dev 1e-15
 </code>
-This value is used to specify the size of the unit capacitor used for explicit capacitors specified in the ''prs'' sublanguage. If unspecified, it is taken to be 1fF.
+This value is used to specify the size of the unit device parameter used for explicit devices specified in the ''prs'' sublanguage. If unspecified, it is taken to be 10<sup>-15</sup>. This is normally used for capacitors.
 <code>
@@ Line 122: / Line 125: @@
-The netlist pass can be used to generate a [[shared staticizer|https://csl.yale.edu/~rajit/ps/sharedstat.pdf]] structure. In this mode, one can specify that minimum and maximum number of staticizers that are permitted for a single shared weak power supply terminal.
+The netlist pass can be used to generate a [[https://csl.yale.edu/~rajit/ps/shared_stat_2020.pdf|shared staticizer]] structure. In this mode, one can specify that minimum and maximum number of staticizers that are permitted for a single shared weak power supply terminal.
 <code>
 int_table weak_sharing 2 8
@@ Line 129: / Line 132: @@
-===== Transistor device names =====
+===== Transistor devices =====
@@ Line 141: / Line 144: @@
 string nfet_hvt  "nhvt"
 </code>
-The strings above are used for the device names for each transistor type. Note that the device type names are part of the technology-independent ACT configuration.
+The strings above are used for the device names for each transistor type. Note that the device type names are part of the [[config:start#devices|technology-independent ACT configuration]].
+There are a number of parameters that are passed to transistor models that determine the width and length of the device, among other parameters. These parameters have default values that are commonly used for most technologies, but they can be modified using configuration file options. The configuration file options to do so are shown below; in the example, the parameters are set to the default value.
+<code>
+begin fet_params
+   string width "W"
+   string length "L"
+   string fin "NFIN"
+   string area_src "AS"
+   string area_drain "AD"
+   string perim_src "PS"
+   string perim_drain "PD"
+end
+</code>
+For example, the width would be specified using ''W=value'' given the parameters above; changing the ''width'' string will change the parameter name passed to the device model.
+  * ''width'' : width of transistor
+  * ''length'' : length of transistor
+  * ''fin'' : number of fins (used for FinFET nodes)
+  * ''area_src'' : area of the source
+  * ''perim_src'' : perimeter of source
+  * ''area_drain'' : area of drain
+  * ''perim_drain'' : perimeter of drain
 If the FET devices being used are floating-body SOI devices, then their spice representation is not of type "M" (model), but of type "X" (subcircuit). The device has the usual source, gate, drain terminals, but the fourth terminal is no longer bulk, but instead the substrate. All substrate terminals are grounded (as opposed to bulk terminals that are connected to the appropriate supply), so this requires a modified netlist. To have the "svt" device correspond to an SOI-type, use the following:
@@ Line 173: / Line 198: @@
 </code>
 The default is blank, but it can be changed as necessary.
+===== Other Devices =====
+Since ''prs'' bodies can have other two-terminal devices, the string to be used in the SPICE output for the device
+can be specified as:
+<code>
+string_table device "C"
+</code>
+This says the first device in the ''prs_device'' table is a capacitor (since ''C'' is the device string used by SPICE for capacitors).
 ===== Interactions with the layout editor Magic =====
@@ Line 218: / Line 253: @@
 </code>
 When production rules are automatically mapped to cells by the cell mapping pass, cell names are generated based on the production rule expressions for the pull-up and pull-down network. These names can get very long, and be difficult to read. This table is used to translate a generated name into something that is more understandable. The table should have an even number of entries that alternate between the generated name and the mapped name.
+<code>
+string cell_inport "in"
+string cell_outport "out"
+</code>
+When cells are generated, their ports are called ''in'' and ''out''. This can be changed to any port name using these configuration file options.
 ====== Sizing configuration options ======
@@ Line 291: / Line 332: @@
 <code>
 string rect_inpath "paths:tosearch/for/rect/files"
+</code>
+This parameter is used to set the search path for ''.rect'' files (when ''rect_import'' is set to one).
+The layout generation tools create fresh rect files. This happens in two scenarios: (a) If rect files are not found, or the ''rect_import'' parameter is set to zero; or (b) When rect files are read in, their LEF bounding box is re-computed and the rectangles are shifted so as to be properly aligned. When saving the final rect files, it can be helpful to keep these two types of outputs separate.  The default output directory for rect files is the current directory.
+<code>
 string rect_outdir "outputrectdir"
 </code>
-These two parameters are used to control the search path for ''.rect'' files (when ''rect_import'' is set to one) and the directory where the final output ''.rect'' files are saved, if ''.rect'' files are generated.
+If this parameter is set, then the output directories for (a) and (b) outputs are both set to the specified directory name.
+<code>
+string rect_outinitdir "out_init"
+</code>
+If this parameter is set, then //initial// rect outputs (i.e. those generated in case (a) above)  are saved to this directory. When both parameters are specified, outputs generated in case (a) are written to ''rect_outinitdir'', while those in case (b) are written to ''rect_outdir''.
 <code>