Differences

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--- intro_example:chp_fifo [2022/06/08 10:49] – [Simulating the buffer] rajit
+++ intro_example:chp_fifo [2025/05/01 15:36] (current) – [Simulating the buffer] rajit
@@ Line 175: / Line 175: @@
 </file>
-This can be simulated using ''actsim'' as follows:
+This can be simulated using ''[[tools:actsim|actsim]]'' as follows. The command-line specifies the ACT file to read, as well as the top-level process name.
+<code>
+% actsim test.act test
+actsim> cycle
+WARNING: test_sink<>: substituting chp model (requested prs, not found)
+WARNING: test_source<>: substituting chp model (requested prs, not found)
+WARNING: one_place_buffer<>: substituting chp model (requested prs, not found)
+actsim> cycle
+[                  30] <tsink>  received 0
+[                  50] <tsink>  received 1
+[                  70] <tsink>  received 2
+[                  90] <tsink>  received 3
+[                 110] <tsink>  received 4
+[                 130] <tsink>  received 5
+[                 150] <tsink>  received 6
+[                 170] <tsink>  received 7
+[                 190] <tsink>  received 8
+[                 210] <tsink>  received 9
+actsim>
+</code>
+The first set of numbers is the time (default delays are 10 time units for each step in the CHP program). Next, the instance name is specified in angle brackets. Finally the log message is displayed.
+''log()'' is used to print output for debugging purposes. When the circuit is going to be synthesized, the ''log()'' statements are simply skipped.