The ACT VLSI design tools
Log In
Search
Trace:
You are here:
start
»
sidebar
Recent Changes
The following pages were changed recently:
View changes of
Pages
Media files
Both pages and media files
Apply
2026/05/10 12:04
asic:start
– [Logic synthesis]
rajit
+2 B
2026/05/10 08:19
summer2026:start
– [ASYNC 2026 Summer School]
ole
+447 B
2026/05/07 17:33
tools:netgen
– [Attributes]
rajit
+198 B
2026/05/03 17:00
tools:actsim
– [Manipulating internal variables]
rajit
-4 B
2026/04/19 13:55
language:migrate
– [Loops]
rajit
-2 B
2026/04/19 13:50
start
– [Installation]
rajit
±0 B
2026/04/19 13:49
thank
– [Internal Contributors]
rajit
+199 B
2026/04/19 10:54
tools:fpga
– [Usage]
rajit
+133 B
2026/04/18 16:15
tools:start
– [Implementation and verification]
rajit
+107 B
2026/04/14 19:33
tools:chp2prs
– [Nested Loop Constructs]
rajit
+6 B
2025/10/14 02:07
tools:prog_compare.png
– created
karthi
+67.1 KB
2024/07/15 16:06
summer2024:customdesign2024.pdf
–
ben
+93.2 KB
2024/07/15 14:39
summer2024:async_lib.pdf
–
rajit
+151.8 KB
2024/07/15 11:42
summer2024:custom_design.tgz
– created
ben
+1.3 KB
2024/07/14 14:38
summer2024:asynchronous_design_methodology_using_act_with_commercial_tools.pdf
– created
rajit
+440.5 KB
2024/07/14 14:38
summer2024:20_intro.pdf
– created
rajit
+206.6 KB
2024/07/12 14:47
summer2024:async_school_2024_-_petri_nets_-_yakovlev_1.0.pdf
– created
rajit
+13.9 MB
2024/07/12 14:47
summer2024:petri_nets_primer_-_async_summer_school_2024_-_yakovlev_1.0.pdf
– created
rajit
+2 MB
2024/07/12 14:47
summer2024:petri_intro.pdf
– created
rajit
+1.1 MB
2024/07/09 10:17
summer2024:pipe.tgz
– created
rajit
+627 B
less recent >>