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asic:timing:graph [2024/03/22 15:11] rajit [Why tick edges at all?] |
asic:timing:graph [2024/03/29 06:13] rajit [Timing model and graph] |
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- | What happens if we make one of the ring oscillators slower? The C-element will wait for the //slower// of the two oscillators before changing its output. Hence, the cycle period of this particular circuit will be determined by the slowest cycle of gates in the circuit. This simple example and intuition can be translated into a [[https:// | + | What happens if we make one of the ring oscillators slower? The C-element will wait for the //slower// of the two oscillators before changing its output. Hence, the cycle period of this particular circuit will be determined by the slowest cycle of gates in the circuit. This simple example and intuition can be translated into a [[https:// |
===== From gates to events ===== | ===== From gates to events ===== |