Members of the asynchronous VLSI and architecture group have been making numerous contributions to the code base. Some have implemented key pieces of the toolflow; others are regular users and have found innumerable bugs and limitations that triggered improvements to the code base and enhancements to functionality. The contributors have been:

• Former and current members of the AVLSI group, as well as some of our collaborators
• Prof. Keshav Pingali's group at UT Austin, who collaborated on some of the core physical design tools. This collaboration was supported by DARPA's Electronics Resurgence Initiative (ERI) as part of the IDEA program.
• Students taking ECE 4260/CPSC 4480/ENAS 8760 (Silicon Compilation) at Yale, especially the offerings in 2018 and 2019 during the early development of the current set of tools where we were fixing bugs in the core library on a daily/weekly basis.

Specific authors can be determined from the git logs.

Many individuals have provided assistance either via contributing documentation, asking questions that led to documentation updates, or finding bugs in the writeup. Some directly added to the documentation, and that can be seen in the wiki logs. Others led to improvements/enhancements in the tools or documentation and are listed below (with their permission). Thank you for your help!

• Amirmohammad Nazari, for finding a number of bugs in and identifying limitations of a range of tools including FPGA mapping, logic synthesis, and the ACT simulator.
• Richard Ross, for detailed feedback on documentation that led to innumerable changes and improvements. He also made quite a few suggestions on features/enhancements; for instance, the if statement in chp-txt is due to his request.