The ACT VLSI Design Tools

Welcome to the Wiki for the ACT suite of VLSI design tools. ACT is an Asynchronous Circuit Toolkit which has been built from scratch to support the design and implementation of asynchronous logic. While that is the main goal, some of the tools we have developed have also been used for designing synchronous logic. These tools have been developed primarily by Rajit Manohar and his research group, and have a long history.

Asynchronous design

ACT language

ACT library


A summary of the ACT tools for custom circuit design and the plan for future tools is available:

Rajit Manohar. An Open-Source Design Flow for Asynchronous Circuits. Government Microcircuit Applications and Critical Technology Conference, March 2019.

If you use the ACT tools for a publication, we would appreciate it if you could cite the following overview paper.

Samira Ataei, Wenmian Hua, Yihang Yang, Rajit Manohar, Yi-Shan Lu, Jiayuan He, Sepideh Maleki, Keshav Pingali. An Open-Source EDA Flow for Asynchronous Logic. IEEE Design & Test, Volume 38, Issue 2, pages 27-37, April 2021. DOI: 10.1109/MDAT.2021.3051334.

For analog circuit simulation, we primarily use the open-source Xyce simulator from Sandia Labs.


We have a Mattermost site for users of the ACT tools. Mattermost is an open-source slack alternative. If you are interested in an account, you can sign up. If you have trouble signing up, please contact Rajit Manohar.