Tools

In addition to the core ACT library, we have also implemented a number of tools for asynchronous circuit design. Some of the core tools are included as part of the main Github repository, while others have their own repository. For completeness, we also include links to other open-source tools that can be used to implement different parts of the VLSI flow.

• prsim: a digital production-rule simulator
• prs2net: a production rule to SPICE netlist generator
• prs2sim: a production rule to sim file converter
• aflat and prspack: a production rule flattener and compaction tool. See the documentation for prsim.

Standalone tools:

• AMC: an asynchronous memory compiler
• ext2sp: converts magic extract files into a hierarchical spice file
• lvp: layout versus production rules

External open-source tools:

• Xyce: An analog circuit simulator developed by Sandia National Labs
• magic: The Magic VLSI layout editor
• irsim: A switch-level circuit simulator
• Gemini: netlist comparison for strict layout-versus-schematic checking

ACT tools that use the core act library all accept the following command-line options. These options should come first, before any tool-specific options:

• -Ttechname: changes the technology configuration files to techname
• -Dname=value: defines the specified parameter (either a pbool or a pint) as a global parameter that can then by used by the ACT file