Asynchronous VLSI and Architecture

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Resilient Asynchronous Systems

     SRAM-based FPGA
Designing for faults in asynchronous systems requires that we must handle errors on signals used for data as well as synchronization.

What is the overhead of handling errors in asynchronous systems? What are the limits of unreliability that can be tolerated by robust design? How do we design for permanent as well as transient faults? What are the implications of nanoscale electronics on the design of large-scale systems? This project investigates some of these questions.

We have developed a number of different approaches to mitigate the impact of a variety of faults in asynchronous logic. Examples include SEU immunity, permanent fault detection and isolation, and architectural techniques for fault tolerance.


Christopher LaFrieda (Ph.D. 2009)
Song Peng (Ph.D. 2006)


S. Ramaswamy, L. Rockett, D. Patel, S. Danziger, R. Manohar, C. Kelly, J. Holt, V. Ekanayake, D. Elftmann. A Radiation Hardened Reconfigurable FPGA. Proceedings of the IEEE Aerospace Conference, March 2009. (abstract, pdf)

Christopher LaFrieda, Engin Ipek, Jose Martinez, and Rajit Manohar. Utilizing dynamically coupled cores to form a resilient chip multiprocessor. Proc. International Conference on Dependable Systems and Networks (DSN), June 2007. (abstract, pdf)

Rajit Manohar, Clinton Kelly IV, et al. Development of Reprogrammable Low Power High Density High Speed RADHARD FPGAs. Government Microcircuit Applications and Critical Technology Conference, March 2007.

Rajit Manohar, Clinton Kelly IV, J. Holt, Chris Liu, Leonard Rockett, Dinu Patel, Steven Danzinger. Application of Low Power High Density Gigahertz Speed Commercial FPGA Technology to High Radiation Applications using RADHARD-by-Process Techniques. Proceedings of the 9th Military and Aerospace Programmable Logic Devices International Conference, September 2006.

Song Peng and Rajit Manohar. Yield Enhancement of Asynchronous Logic Circuits through 3-Dimensional Integration Technology. Proceedings of the ACM Great Lakes Symposium on VLSI (GLVLSI), April 2006. (abstract, pdf)

Song Peng and Rajit Manohar. Self-healing Asynchronous Arrays. Proceedings of the 12th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), March 2006. (abstract, pdf)

Song Peng and Rajit Manohar. Efficient Failure Detection in Pipelined Asynchronous Circuits. Proceedings of the IEEE Symposium on Defect and Fault Tolerance in VLSI Systems (DFT), October 2005. (abstract, pdf)

Song Peng and Rajit Manohar. Fault Tolerant Asynchronous Adders through Dynamic Self-reconfiguration. Proceedings of the IEEE International Conference on Computer Design (ICCD), October 2005. (abstract, pdf)

Christopher LaFrieda and Rajit Manohar. Robust Fault Detection and Isolation Techniques for Quasi Delay-Insensitive Circuits. Proceedings of the International Conference on Dependable Systems and Networks (DSN), July 2004. (abstract, pdf, ps)