Design Methodology and Automation

Most of the theory we have developed is a direct result of problems encountered when using existing synthesis methods for asynchronous design. Therefore, our focus is on new theory and tools that enable large-scale design.

We have released our asynchronous VLSI design tools. We also have a wiki for documentation.

Participants

Karthi Srinivasan

Alums

Samira Ataei (Ph.D. 2017 Oklahoma State)

Filipp Akopyan (Ph.D. 2011)

Ruslan Dashkin (Ph.D. 2024)

David Fang (Ph.D. 2008)

Wenmian Hua (Ph.D. 2020)

Rui Li (Ph.D. 2021)

Brittany Nkounkou (advised by Ross Tate, CS)

Stephen Longfield (Ph.D. 2015)

Sandra Jackson (Ph.D. 2014)

Song Peng (Ph.D. 2006)

John Teifel (Ph.D. 2004)

Xiang Wu (Ph.D. 2024)

Yihang Yang (Ph.D. 2022)

Publications

Thomas Jagielski, Xiayuan Wen, Matthew Dobre, Rajit Manohar. Integrating Asynchronous Circuits into the Caravel Testing Harness. Workshop on Open-Source EDA Technology (WOSET), November 2024. (abstract, pdf)

Ruslan Dashkin and Rajit Manohar. Mixed-Level Emulation of Asynchronous Circuits on Synchronous FPGAs. To appear, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2024. (pdf)

Karthi Srinivasan and Rajit Manohar. Maelstrom: A Logic Synthesis Technique for Asynchronous Circuits. International Workshop on Logic Synthesis (poster) (IWLS), June 2024.

Rajit Manohar and Yoram Moses. Timed Signaling Processes. IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), July 2023. (abstract, pdf)   — Best paper award

Xiang Wu and and Rajit Manohar. Verification-driven Design for Asynchronous VLSI. IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), July 2023. (abstract, pdf)

Karthi Srinivasan, Yoram Moses, and Rajit Manohar. Opportunistic Mutual Exclusion. IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), July 2023. (abstract, pdf)   — Best paper nominee

Rajit Manohar. xcell: a library characterizer for combinational and state-holding gates. Workshop on Open-Source EDA Technology, International Conference on Computer-Aided Design (WOSET), November 2022. (pdf)

Ruslan Dashkin and Rajit Manohar. General Approach to Asynchronous Circuits Simulation Using Synchronous FPGAs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 41(10):3452--3465 (TCAD), October 2022. (pdf)

Alex Fallin, Aarti Kothari, Jiayuan He, Christopher Yanez, Keshav Pingali, Rajit Manohar, Martin Burtscher. A Simple, Fast, and GPU-friendly Steiner-Tree Heuristic. IEEE International Parallel and Distributed Processing Symposium Workshops, May 2022. (pdf)

Jiayuan He, Udit Agarwal, Yihang Yang, Rajit Manohar, Keshav Pingali. SPRoute 2.0: A detailed routability-driven deterministic parallel global router with soft capacity. 27th Asia and South Pacific Design Automation Conference (ASPDAC), January 2022. (pdf)

Jiayuan He, Wenmian Hua, Yi-Shan Lu, Sepideh Maleki, Yihang Yang, Keshav Pingali, and Rajit Manohar. interact: An Interactive Design Environment for Asynchronous Logic. Workshop on Open-Source EDA Technology, International Conference on Computer-Aided Design (WOSET), November 2021. (pdf)

Rui Li, Lincoln Berkley, Yihang Yang, and Rajit Manohar. Fluid: An Asynchronous High-level Synthesis Tool for Complex Program Structures. IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), September 2021. (abstract, pdf)   — Best paper nominee

Samira Ataei, Wenmian Hua, Yihang Yang, Rajit Manohar, Yi-Shan Lu, Jiayuan He, Sepideh Maleki, Keshav Pingali. An Open-Source EDA flow for Asynchronous Logic. IEEE Design & Test (special issue on open-source EDA), April 2021. (abstract, pdf)

Ned Bingham and Rajit Manohar. A Systematic Approach for Arbitration Expressions. IEEE Transactions on Circuits and Systems I: Regular Papers, 67:(12):4960--4969 (TCAS), December 2020. (abstract, pdf)

Udit Agarwal, Samira Ataei, Jiayuan He, Wenmian Hua, Yi-Shan Lu, Sepideh Maleki, Yihang Yang, Keshav Pingali, Rajit Manohar. A Digital Flow for Asynchronous VLSI Systems: Status Update. Workshop on Open-Source EDA Technology, International Conference on Computer-Aided Design (WOSET), November 2020. (pdf)

Jiayuan He, Yihang Yang, Rajit Manohar. A power router for gridded cell placement. Workshop on Open-Source EDA Technology, International Conference on Computer-Aided Design (WOSET), November 2020. (pdf)

Yihang Yang, Jiayuan He, Rajit Manohar. Dali: A gridded cell placement flow. IEEE International Conference on Computer-Aided Design (ICCAD), November 2020. (abstract, pdf)

Rajit Manohar. Exact Timing Analysis for Asynchronous Circuits with Multiple Periods. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 39(10):3134--3138 (TCAD), October 2020. (abstract, pdf)

Yi-Shan Lu, Rajit Manohar, Keshav Pingali. Blitz: A Static Timing Analyzer Parallelized Using Operator Formulation. Work-in-progress session, Design Automation Conference, July 2020.

Samira Ataei, Rajit Manohar. Shared staticizer for area-efficient asynchronous circuits. Proceedings of the IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), May 2020. (abstract, pdf)

Wenmian Hua, Yi-Shan Lu, Keshav Pingali, Rajit Manohar. Cyclone: a static timing and power analysis engine for asynchronous circuits. Proceedings of the IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), May 2020. (abstract, pdf)   — Best paper award

Wenmian Hua, Yi-Shan Lu, Keshav Pingali, Rajit Manohar. Cyclone: a fast static timing analysis engine for asynchronous circuits. ACM Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), March 2020.

Samira Ataei, Yi-Shan Lu, Jiayuan He, Wenmian Hu, Sepideh Maleki, Yihang Yang, Keshav Pingali, Rajit Manohar. Toward a digital flow for asynchronous VLSI systems. Workshop on Open-Source EDA Technology, International Conference on Computer-Aided Design (WOSET), November 2019. (pdf)   — 2nd place, best open-source tool

Samira Ataei, Rajit Manohar. A unified memory compiler for synchronous and asynchronous circuits. Workshop on Open-Source EDA Technology, International Conference on Computer-Aided Design (WOSET), November 2019. (pdf)   — 3rd place, best open-source tool

Jiayuan He, Martin Burtscher, Rajit Manohar, Keshav Pingali. SPRoute: A Scalable Parallel Negotiation-based Global Router. International Conference on Computer-Aided Design (ICCAD), November 2019. (abstract, pdf)

Jiayuan He, Martin Burtscher, Rajit Manohar, Keshav Pingali. SPRoute: A Scalable Parallel Negotiation-based Global Router. Work-in-progress session, Design Automation Conference, June 2019.

Rajit Manohar and Yoram Moses. Asynchronous Signalling Processes. Proceedings of the IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), May 2019. (abstract, pdf)

Samira Ataei and Rajit Manohar. AMC: An Asynchronous Memory Compiler. Proceedings of the IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), May 2019. (abstract, pdf)   — Best paper nominee

Nitish Srivastava and Rajit Manohar. Operation Dependent Frequency Scaling Using Desynchronization. IEEE Transactions on VLSI, 27(4):799--809 (TVLSI), April 2019. (abstract, pdf)

Yi-Shan Lu, Wenmian Hua, Rajit Manohar, and Keshav Pingali. ParallelClosure: A Parallel Design Optimizer for Timing Closure. ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), March 2019.

Rajit Manohar. An Open-Source Design Flow for Asynchronous Circuits. Government Microcircuit Applications and Critical Technology Conference, March 2019. (abstract, pdf)

Yi-Shan Lu, Samira Ataei, Jiayuan He, Wenmian Hu, Sepideh Maleki, Yihang Yang, Martin Burtscher, Keshav Pingali, Rajit Manohar. Parallel Tools for Asynchronous VLSI Systems. Workshop on Open-Source EDA Technology, International Conference on Computer-Aided Design (WOSET), November 2018. (abstract, pdf)

Wenmian Hua and Rajit Manohar. Exact Timing Analysis for Asynchronous Systems. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 37(1):203-216 (TCAD), January 2018. (abstract, pdf)

Asa Dan, Rajit Manohar, and Yoram Moses. On Using Time Without Clocks via Zigzag Causality. ACM Symposium on Principles of Distributed Computing (PODC), July 2017. (abstract, pdf)

Rajit Manohar and Yoram Moses. The Eventual C-Element Theorem for Delay-Insensitive Asynchronous Circuits. Proceedings of the IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), May 2017. (abstract, pdf)   — Best paper nominee

Nitish Srivastava, Steve Dai, Rajit Manohar, and Zhiru Zhang. Accelerating Face Detection on Programmable SoC Using C-Based Synthesis. Proc. ACM Symposium on Field-Programmable Gate Arrays (FPGA), February 2017. (abstract, pdf)

Filipp Akopyan, Carlos Tadeo Ortega Otero, and Rajit Manohar. Hybrid Synchronous-Asynchronous Tool Flow for Emerging VLSI Design. IEEE International Workshop on Logic Synthesis (IWLS), June 2016. (abstract, pdf)

Wenmian Hua and Rajit Manohar. Exact Timing Analysis for Concurrent Systems. Work-in-progress session, Design Automation Conference, June 2016.

Sandra Jackson and Rajit Manohar. Gradual Synchronization. IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), May 2016. (abstract, pdf)   — Best paper nominee

Stephen Longfield, Brittany Nkounkou, Rajit Manohar, and Ross Tate. Preventing Glitches and Short Circuits in High-Level Self-Timed Chip Specifications. 36th Annual ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), June 2015. (abstract, pdf)

Rajit Manohar and Yoram Moses. Analyzing Isochronic Forks with Potential Causality. IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), May 2015. (abstract, pdf)   — Best paper nominee

Robert Karmazin, Stephen Longfield, Carlos Tadeo Ortega Otero, and Rajit Manohar. Timing Driven Placement for Quasi Delay-Insensitive Circuits. IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), May 2015. (abstract, pdf)

Carlos Tadeo Ortega Otero, Jonathan Tse, Robert Karmazin, Benjamin Hill, and Rajit Manohar. Automatic Obfuscated Cell Layout for Trusted Split-Foundry Design. IEEE International Symposium on Hardware-Oriented Security and Trust, May 2015.

Stephen Longfield and Rajit Manohar. Removing Concurrency for Rapid Functional Verification. Proceedings of the 2014 International Conference on Computer-Aided Design (ICCAD), November 2014. (abstract, pdf)

Benjamin Hill, Robert Karmazin, Carlos Tadeo Ortega Otero, Jonathan Tse, and Rajit Manohar. A Split-Foundry Asynchronous FPGA. Proceedings of the IEEE Custom Integrated Circuits Conference (CICC), September 2013. (abstract, pdf)

Robert Karmazin, Carlos Otero, and Rajit Manohar. CellTK: Automated Layout for Asynchronous Circuits with Nonstandard Cells. Proceedings of the 19th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), May 2013. (abstract, pdf)

Stephen Longfield and Rajit Manohar. Inverting Martin Synthesis for Verification. Proceedings of the 19th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), May 2013. (abstract, pdf)   — Best paper award

Christopher LaFrieda and Rajit Manohar. Reducing Power Consumption with Relaxed Quasi Delay-Insensitive Circuits. Proceedings of the 15th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), May 2009. (abstract, pdf)

Song Peng, David Fang, John Teifel, and Rajit Manohar. Automated Synthesis for Asynchronous FPGAs. 13th ACM International Symposium on Field Programmable Gate Arrays (FPGA), February 2005. (abstract, pdf, ps)

John Teifel and Rajit Manohar. Static Tokens: Using Dataflow to Automate Concurrent Pipeline Synthesis. Proceedings of the 10th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), April 2004. (abstract, pdf, ps)

Rajit Manohar. Scalable Formal Design Methods for Asynchronous VLSI. Proceedings of the 29th ACM SIGPLAN/SIGACT Conference on the Principles of Programming Languages [invited] (POPL), Portland, OR, January 2002.

Rajit Manohar. An Analysis of Reshuffled Handshaking Expansions. Proceedings of the 7th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), pp. 96--105, Salt Lake City, Utah, March 2001. (abstract, pdf, ps)

Rajit Manohar. The Entropy of Traces in Parallel Computation. IEEE Transactions on Information Theory, 45(5):1606--1608, July 1999. (abstract, pdf, ps)

Rajit Manohar, Tak-Kwan Lee, and Alain J. Martin. Projection: A Synthesis Technique for Concurrent Systems. Proceedings of the 5th IEEE International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC), pp. 125--134, April 1999. (abstract, pdf, ps)

K. Rustan M. Leino and Rajit Manohar. Joining Specification Statements. Theoretical Computer Science, 216:375-394, March 1999. (abstract, ps)

Rajit Manohar and Alain J. Martin. Slack Elasticity in Concurent Computing . Proceedings of the Fourth International Conference on the Mathematics of Program Construction (MPC), Lecture Notes in Computer Science 1422, pp. 272-285, Springer-Verlag 1998. (abstract, pdf, ps)